1. Field
This disclosure relates to Si wire arrays. More specifically, the present disclosure describes structures of vertically oriented Si wire arrays and methods for forming such arrays.
2. Description of Related Art
Well-defined wire arrays have been produced using lithographic patterning followed by anisotropic etching, but such methods typically require large areas of high-quality substrate materials. See, for example, Z. Huang, H. Feng, and J. Zhu, Adv. Mater. (Weinheim, Ger.) 19, 744 (2007).
Wires of various materials have also been grown ‘bottom up’ by the vapor-liquid-solid (VLS) process. See, for example, R. S. Wagner and W. C. Ellis, Appl. Phys. Lett. 4, 89 (1964). Control of the size and position of VLS-grown wires has been demonstrated, particularly in the case of Si, by patterning of a surface oxide. See, for example, E. I. Givargizov, Highly Anisotropic crystals (D. Reidel, Dordrecht, Holland, 1987), p. 169; T. Martensson, M. Borgstrom, W. Seifert, B. J. Ohlsson, and L. Samuelson, Nanotechnology 14, 1255 (2003); J. Westwater, D. P. Gosain, and S. Usui, Jpn. J. Appl. Phys., Part 1 36, 6204 (1997); T. Kawano, Y. Kato, M. Futagawa, H. Takao, K. Sawada, and M. Ishida, Sens. Actuators, A 97, 709 (2002); B. M. Kayes, J. M. Spurgeon, T. C. Sadler, N. S. Lewis, and H. A. Atwater, Proceedings of the Fourth IEEE WCPEC, 2006, Vol. 1, p. 221. Wire array growth, typically, has only been achieved over relatively small areas, unless a template is used. See, for example, T. Shimizu, T. Zie, J. Nishikawa, S. Shingybara, S. Senz, and U. Gosele, Adv. Mater. (Weinheim, Ger.) 19, 917 (2007). Wire array growth by some methods may result in a random distribution of wires on a substrate and/or where the wires have random orientations with respect to each other. Such wire arrays may have an appearance that may be characterized as similar to felt or felt-like.